1. Field of the Invention
The present invention relates to thermal management of high heat flux multi-layer integrated circuits, and more particularly, to a method of fabrication of high heat flux multi-layer integrated circuits with enhanced thermal management, and apparatus thereof.
2. Description of the Related Art
Thermal management is an important consideration in the fabrication of high power integrated circuits (ICs) and RF electronics. Many approaches have been applied to the integrated circuit (IC) heat rejection problem ranging from the chip level to the packaging level. These approaches include both active and passive cooling, as well a conductive, convective, and radiative-based methods. In terms of addressing the limitations of the growth substrates of the high power ICs to conduct heat from vertically stacked configurations, only substrate thinning and thermal vias through the stack have been reported. Thinning of the growth substrate is a common practice in microelectronic technologies. For example, multi-layer silicon processors have demonstrated thinning down to the 10-micron level to support high levels of interconnection between the layers. In these stacked IC layers, thermal vias have also been reported to aid in the heat transfer through the stack.
In additional, epilayer transfer methods have been utilized in 2D circuit configurations to replace a growth substrate with a host substrate with better thermal conductivity. However, when multiple IC layers are stacked together, the thermal expansion mismatch problem is often encountered when joining dissimilar materials.
Therefore, it is desirable to have a multi-layer IC apparatus with good thermal management characteristics and a corresponding method of fabricating such apparatus.